Schematic diagram You can download pdf version here . Schematic is very simple: Design consists of three main parts: Q1, Q2 oscillators 45/49Mhz, U4 - Xilinx CPLD - main logic and reclocker circuit build on U5, U6 and U7. Each part has its own LDO (U1, U2, U3). You can use many IC's in SOT23 package, also there is footprint on the PCB for bypass cap. In the prototype I'm using LP5907. X1 is the input of the external power supply. In case of an external supply, JP3 should be open. There is no need for a separate jtag port, as we will program Xilinx directly through Raspberry Pi gpio. PCB Assembled boards Here with ordinary oscillators and xc9572xl And here with CCHD-957 from Crystek and xc9536xl Here is the BOM: C1 47uF/10V SMB tantal. C2, C5, C18 2.2uF/25V 12...
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